Linux 7.5 Purges the Last 1997 Intel MMX Optimizations: Over 800 Lines of Pentium Assembly Replaced by 12 Lines of Code
Thirty years after the fanfare surrounding the launch of Intel Pentium MMX processors in January 1997, the open-source Linux 7.5 kernel (slated for release in early 2027) is preparing to close the chapter on the x86 architecture's very first vector instruction set. Through a three-patch series submitted by Google kernel engineer Eric Biggers and queued in Andrew Morton's mm-everything branch on the official Linux kernel Git repository (kernel.org), the final surviving pocket of MMX assembly optimizations is being stripped from the operating system.
The Final Software RAID Holdout: Over 800 Lines of Assembly Replaced by 12 Lines
Contrary to what many enthusiasts might assume, the Linux kernel's most frequently called memory management routines (including memcpy(), copy_page(), and clear_page()) already shed their 32-bit MMX and 3DNow! paths back in 2021 via commit c6dbd3e5e69c. Likewise, neither the cryptographic subsystem nor CRC checksum routines relied on MMX instructions anymore. Across the entire kernel source tree, only one isolated outlier remained: the software RAID XOR parity and RAID6 subsystem.
Specifically, 32-bit x86 header files still carried hand-written assembly routines tailored for P55C Pentium MMX and Pentium II processors to accelerate XOR parity calculations on multi-drive RAID arrays running on vintage chips that lack SSE support. By retiring this obsolete fast path and cleaning up CPU feature checks in the RAID6 module, Eric Biggers' patch series deletes more than 800 lines of legacy code and replaces them with just 12 lines. This codebase streamlining echoes the proactive engineering seen in our coverage of Linux kernel security maintenance and SteamOS vulnerability patching, where pruning dead code paths directly reduces long-term maintenance overhead.
Crucially for retro-computing enthusiasts, this cleanup does not break hardware compatibility. If a dedicated collector boots Linux 7.5 on a genuine 1997 Intel Pentium MMX, Pentium II, or AMD K6 system running a software RAID array, the kernel will still boot and operate normally. Instead of invoking 30-year-old MMX assembly, the kernel will simply fall back to its existing, well-tested scalar C code paths (scalar C fallbacks).
Why 1997 MMX Shared x87 FPU Registers: Inside Intel's Architectural Compromise
To understand why kernel maintainers were eager to retire the last MMX routines, one has to look back at the hardware compromise Intel engineered for the Pentium P55C in January 1997. Fabricated on a 350nm CMOS process with 4.5 million transistors and a doubled 32KB L1 cache (16KB instruction and 16KB data), the chip introduced 57 new SIMD (Single Instruction, Multiple Data) instructions operating on 64-bit integer vectors (packing eight bytes, four 16-bit words, or two 32-bit doublewords into a single instruction).
So that Windows 95, OS/2, and contemporaneous Linux kernels could run MMX software out of the box without modifying their operating system context-switch handlers, Intel architects made a bold trade-off: rather than adding a dedicated bank of new physical registers, they aliased the eight 64-bit MMX registers (MM0 through MM7) directly onto the 64-bit mantissa portion of the eight 80-bit x87 floating-point unit (FPU) stack registers (ST(0) through ST(7)).
Because both units shared the same physical register file, a CPU could never execute x87 floating-point math and MMX vector instructions at the same time. After every MMX code block, software had to issue the slow EMMS (Empty MMX State) instruction to clear the FPU tag word before any floating-point calculation could resume. Inside the Linux kernel, using MMX registers for a RAID XOR pass also required saving and restoring hardware FPU state. Historically, while consumer marketing promoted MultiMedia eXtensions, Intel officially argued in court that "MMX" was a meaningless trademarked initialism, until litigation with AMD surfaced internal documents referencing Matrix Math Extensions, a chapter of silicon history as fascinating as the working Intel Larrabee GPU development kit recently uncovered in a storage unit.
Comparison Table: 30 Years of x86 SIMD Vector Instruction Evolution
| Instruction Set | Release Year | Vector Width | Register File Architecture | Landmark Processors |
|---|---|---|---|---|
| Intel MMX | January 1997 | 64-bit (packed integers only) | 8 registers (MM0 to MM7) aliased onto x87 FPU stack | Intel Pentium MMX (P55C), Pentium II, AMD K6, Cyrix 6x86MX |
| AMD 3DNow! | May 1998 | 64-bit (single-precision FP) | 8 registers (MM0 to MM7) aliased onto x87 FPU stack | AMD K6-2, K6-III, Athlon K7 |
| SSE / SSE2 | 1999 / 2000 | 128-bit (32/64-bit FP and integers) | 8 then 16 dedicated independent registers (XMM0 to XMM15) | Intel Pentium III (SSE), Pentium 4, AMD Athlon 64 (SSE2) |
| AVX / AVX2 | 2011 / 2013 | 256-bit (FP, integers, and FMA) | 16 dedicated registers (YMM0 to YMM15) | Intel Sandy Bridge, Haswell, Core Ultra, AMD Zen to Zen 3 |
| AVX-512 / AVX10 | 2017 / 2026 | 512-bit (RAID XOR, crypto, and AI) | 32 dedicated registers (ZMM0 to ZMM31) + mask registers | Intel Xeon, AMD Ryzen 7000 (Zen 4) and Ryzen 9000 (Zen 5) |
On contemporary hardware, the architectural leap is massive: whereas 1997 MMX processed 8 bytes at a time across borrowed floating-point registers, modern processors equipped with full-width 512-bit native AVX-512 execution units (such as the Zen 5 architecture inside the AMD Ryzen 7 9800X3D) process 64 bytes per instruction in a single clock cycle, which is exactly where Eric Biggers and Linux kernel developers focus today's XOR and cryptographic optimizations.
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My Perspective
Whenever I swap stories with Bastien "Orion" in our lab (where our lab doors are wide open for any classic or modern silicon review sample) about building beige AT towers back in early 1997, the metallic Intel Inside Pentium MMX case badge immediately brings back a pivotal era of PC gaming. Upgrading from a standard Pentium 133 to a Pentium MMX at 166 MHz or 200 MHz promised smoother MPEG-1 video playback, cleaner software audio mixing, and flagship showcase games built specifically around those 57 new instructions, most notably Ubisoft's futuristic racer POD: Planet of Death and MMX-patched builds of Quake.
The fact that a pocket of hand-tuned 64-bit MMX assembly survived for nearly three decades deep inside the Linux software RAID layer is a testament to the extraordinary longevity of open-source software. From a systems engineering perspective, trading over 800 lines of x87-aliased assembly for 12 clean lines while keeping the scalar C fallback intact is the smartest call possible: a 1997 Pentium MMX will still boot Linux 7.5 in 2027, and kernel maintainers can finally retire a foundational piece of PC history with full honors.
Based on the outskirts of New York City, Chaya 'Chayane' spent five years studying software engineering in Montreal before returning to her home state. A Full-Stack developer and Deep Learning AI architecture researcher, she explores neural networks and algorithmic optimization while engineering data pipelines for Retrocharting and Gamescharting alongside Grimtag. A gamer for over 20 years and an avid collector of Nintendo history and The Legend of Zelda, she explored World of Warcraft's Azeroth before bringing her deep technical background to video game analysis.
