Medusa Point Mobile Processor (Zen 6): 10 Hybrid Cores, 3,100 Geekbench 7 Score, and +13% Over Strix Halo

An early engineering sample of AMD's next-generation Ryzen Zen 6 "Medusa Point" mobile APU has surfaced in the public Geekbench 7 database. Tested inside a Lenovo reference validation platform (board ID 22ETPF6DTA), the chip carries the OPN code 100-000001713-32_Y and provides our first concrete look at the core layout and single-thread leap coming to the Ryzen AI 500 laptop lineup expected in early 2027.
10-Core Hybrid Topology (4 Zen 6 + 6 Zen 6c), AVX-512, and Unified 16MB L3 Cache
According to the Geekbench 7 hardware log, this Medusa Point sample features a 10-core, 20-thread hybrid configuration split into two clusters: 4 full-performance Zen 6 cores paired with 6 dense Zen 6c cores engineered for multi-threaded power efficiency.
Each core is equipped with 1MB of dedicated L2 cache (10MB L2 total) backed by a 16MB shared L3 cache. The diagnostic telemetry also confirms full support for AVX-512 instruction sets (including AVX512-FP16 and AVX512-VNNI) alongside 64GB of quad-channel DDR5/LPDDR5X memory running at 5,188 MT/s, building directly upon the official AMD Ryzen mobile processor lineup.

ASUS ROG Zephyrus G14 (AMD Ryzen AI 9 HX 370)
- AMD Ryzen AI 9 HX 370 processor (12 cores, 24 threads, 50 TOPS NPU)
- 14-inch ROG Nebula 3K 120Hz OLED display (0.2ms response time)
- Precision-machined 1.5 kg CNC aluminum chassis
- High-speed LPDDR5X memory and Tri-Fan thermal architecture
3,100 Single-Core Score in Geekbench 7 and RDNA 4m Integrated Graphics
Even though Geekbench read the early silicon's base and maximum clock sensors at a locked 2.00 GHz (1.99 GHz reported), engineering sample 100-000001713-32_Y delivered a standout 3,100 Single-Core score and 18,313 Multi-Core score in Geekbench 7.
In single-threaded workloads, that 3,100-point result already edges past several stock desktop Zen 5 processors (such as the Ryzen 9 9950X and 9900X) and posts roughly a 13% single-core lead over AMD's 16-core mobile flagship Ryzen AI Max+ 395 ("Strix Halo"). Those numbers align closely with the +16.5% IPC jump recently measured on AMD Zen 6c cores in Geekbench 7 as well as AMD's HIPRT 3.2 ray-tracing library confirming RDNA 4m (gfx1170 and gfx1171) integrated GPUs for Medusa.
| Specification | AMD "Medusa Point" (ES 100-000001713-32_Y) | AMD Strix Point (Ryzen AI 9 365) |
|---|---|---|
| CPU Architecture | Hybrid Zen 6 (4x Zen 6 + 6x Zen 6c) | Hybrid Zen 5 (4x Zen 5 + 6x Zen 5c) |
| Cores / Threads | 10 cores / 20 threads | 10 cores / 20 threads |
| L2 / L3 Cache | 10MB L2 (1MB/core) + 16MB shared L3 | 10MB L2 (1MB/core) + 24MB L3 (16+8MB split) |
| Expected iGPU Architecture | RDNA 4m (gfx1170 / gfx1171) or RDNA 3.5 | RDNA 3.5 (Radeon 880M) |
| Geekbench 7 (Single / Multi) | 3,100 pts / 18,313 pts (early ES) | ~2,720 pts / ~14,800 pts |
My Take on the Spec Sheet
Beyond the headline 3,100 single-core score showcasing Zen 6's raw IPC uplift, one architectural detail in this Geekbench log immediately stands out to me: the presence of a single shared 16MB L3 cache across all 10 cores (4 Zen 6 + 6 Zen 6c). On current Strix Point chips, splitting the Zen 5 and Zen 5c cores across two separate CCX clusters (16MB + 8MB) introduces cross-CCX latency penalties whenever a game thread migrates between clusters. Unifying all 10 cores onto a single L3 ring while pairing them with an RDNA 4m iGPU inside a 28W to 54W thermal envelope should deliver noticeably tighter 1% Low frametimes on thin-and-light gaming laptops and future handhelds. We obviously have not had our hands on this silicon yet at the lab: if AMD's hardware team would like to send over a Ryzen AI 500 "Medusa Point" review unit once production laptops ship for full real-world benchmarking, our test bench is wide open.
















