700,000 Memory Wafers a Month: How Elon Musk's Terafab Targets Samsung's Entire Global DRAM Capacity by 2032

300mm silicon wafer inside a semiconductor cleanroom for Elon Musk's Terafab foundry

One million 300mm silicon wafers processed every single month after 2032, with 700,000 of those wafers dedicated entirely to memory chips. During a recent procurement visit to Japan reported by business daily Nikkei Financial News, purchasing executives from Terafab, the vertically integrated semiconductor joint venture backed by Tesla and SpaceX in Texas, laid out their long-term equipment roadmap to Japanese toolmakers. That monthly memory target alone would match the entire estimated global DRAM manufacturing capacity of Samsung Electronics.

An Aggressive Japanese Toolmaking Push Aiming for Late 2028 Mass Production

Built to fulfill Elon Musk's stated ambition of generating one terawatt of AI and robotics compute power per year, the Austin-based Terafab project is designed to house logic fabrication, memory production, advanced packaging, and testing under a single roof. During their trip across Japan, Terafab's procurement team met directly with leading local semiconductor equipment suppliers specializing in lithography coaters, plasma etching, wafer dicing, and inspection tools.

The delivery schedule requested by Musk's team has already raised eyebrows across the supply chain: Terafab reportedly asked several Japanese toolmakers to deliver initial machinery within just a few months to support an initial mass production target in the second half of 2028. Once scaled to full capacity after 2032, the venture aims to process 1 million wafers per month (roughly 12 million wafers annually), a volume equivalent to approximately 70% of TSMC's entire current worldwide foundry output across all process nodes.

700,000 Memory Wafers and 300,000 Logic Wafers: Building a Second Samsung From Scratch

What stands out most in Terafab's briefing to equipment makers is the 70/30 split between memory and logic. Out of the planned one million monthly wafers, Terafab intends to allocate more than 300,000 wafers per month to logic semiconductors (powering Tesla's AI5 and AI6 self-driving chips, Dojo training processors, Optimus robotics hardware, and SpaceX systems) while dedicating 700,000 wafers per month to memory chips.

To put that number into hardware perspective, Samsung Electronics currently operates an estimated global DRAM capacity of roughly 650,000 to 700,000 wafers per month, while SK Hynix and Micron run at lower monthly wafer volumes even as Micron's 1-delta DRAM and High-NA EUV roadmap scales through 2030. In practical terms, Musk wants to build a memory manufacturing footprint on par with the world's largest DRAM maker to insulate his companies from the severe HBM and DRAM supply bottlenecks gripping the tech industry.

Terafab Industrial MetricTarget Shared With SuppliersIndustry Benchmark
Location & StructureAustin, Texas (Tesla & SpaceX joint venture)Unified logic, memory, packaging, and testing
Initial Mass ProductionSecond half of 2028First tool deliveries requested within months
Post-2032 Total Output1,000,000 wafers (300mm) / monthRoughly 70% of TSMC's total global capacity
Memory Allocation (DRAM / HBM)700,000 wafers / month (70%)Rivals Samsung's entire global DRAM capacity
Logic Allocation (AI Compute)Over 300,000 wafers / month (30%)Tesla AI5/AI6, Dojo, Optimus, and SpaceX chips

10,000 Nvidia "Kessel" GPU Racks in Orbit by 2028: Why SpaceX Is Hungry for Silicon

The sheer scale of Terafab's memory ambitions aligns directly with SpaceX's parallel orbital compute plans. According to a supply-chain research note from analyst Jeff Pu at GF Securities, SpaceX is projected to build up to 5 gigawatts of space-based AI computing capacity by 2028. That orbital network will rely on next-generation AI satellites engineered to handle peak power loads of 400 kW per spacecraft.

Before Terafab can supply its own silicon in the 2030s, Jeff Pu estimates that SpaceX's 2028 orbital deployment will require roughly 10,000 space-optimized Nvidia GPU server racks, codenamed "Kessel" and built on Nvidia's upcoming Vera Rubin architecture. Because every Vera Rubin rack demands massive stacks of HBM4 memory, corporate hyperscalers and AI ventures are soaking up global wafer allocations, a trend underscored when OpenAI's Sam Altman called having RAM in desktop PCs "quite terrible" while advocating for cloud data centers.

Check Availability for DDR5 RAM Kits on Amazon→

The Strategist's Take

Looking at a 700,000-wafer monthly memory target from an engineering standpoint, two realities stand out immediately. First, it took Samsung, SK Hynix, and Micron decades of relentless process tuning to achieve viable yields on cutting-edge DRAM nodes and multi-layer HBM packaging. Expecting a brand-new Texas fab to receive cleanroom tools within months and hit mass production by the second half of 2028 is an extraordinarily tall order, which explains why veteran Japanese equipment makers remain skeptical of the timeline. We have not yet had a physical unit on our desk—if the manufacturer's team would like to send over a review sample so we can put it through our full real-world testing protocol, our lab doors are wide open.

Second, for PC builders and gamers, Terafab presents a sharp double-edged sword. Over the long run after 2032, if Tesla, SpaceX, and xAI truly manufacture their own DRAM and HBM in-house, they will stop draining millions of wafers from Samsung and SK Hynix, freeing up cleanroom capacity for consumer DDR5, future DDR6, and GDDR7 graphics memory. Between now and 2030, however, Terafab's aggressive rush to buy up scarce Japanese lithography, etching, and dicing machines could tighten global fab tool bottlenecks even further while SpaceX's 10,000 Nvidia Vera Rubin racks devour near-term memory supply.

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Maëlle "Kaelen"
Written by Maëlle "Kaelen"
🗺️ Guides & Esports Specialist 🍁 Montreal

Born and based in Montreal's Mile End district, Maëlle "Kaelen" became close friends with Chaya during their university software engineering years, bonding over late-night coding labs, campus LANs, and World of Warcraft raids alongside Grimtag and Heimdall. A game systems balancing consultant and lifelong theorycrafter, she cut her teeth in the early 2010s writing boss walkthroughs, frame-data breakdowns, and competitive meta guides for specialized French-language MMORPG and esports portals, including Mondes Persistants, as well as North American strategy collections. On Pro-Gamer, she leads in-depth walkthroughs, build optimization, and tactical esports coverage.

Focus: 🗺️ Walkthroughs, Theorycrafting & Esports Meta @kaelen.pg
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